Is DVB-S digital satellite receiver RF front-end chip, zero-IF scheme, RF front-end integrated low-noise amplifier (LNA) and RF controlled amplifier (RFVGA), I / Q demodulator mixer (I / Q MIXER ). IF part I, Q are two independent channels, each output buffer amplifier with integrated IF, LPF, VGC, etc. blocks. Chip integrates a complete PLL (internal integration of the VCO), for the mixer to provide the local oscillator and clock signal. LW10039 by QFN28 package, operating temperature range of -10 ~ +85 ℃.
Main features：
Adopted from the L-band to zero IF direct quadrature downconverter for direct conversion tuner
Baud rate of 1 ~ 45MSps
Independent of RF AFC and baseband gain control
Fifth-order baseband filters with adjustable bandwidth from 6MHz to 43MHz
Function with RFBYpass
I2C bus control
Voltage Supply: 3.3V ± 5%
Package QFN28
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